Microelectronic device geometries have dramatically decreased in size since such devices were first introduced several decades ago. Due to ever shrinking geometries, changes have been made throughout the semiconductor manufacturing process. For example, photolithography has adopted the use of phase shifting masks, optical proximity correction, off-axis illumination, and other techniques for extending process capability to ever shrinking design rules. However, such techniques still do not provide high depth of focus (DOF) and low mask error enhancement factor (MEF or MEEF), which may be defined as the ratio between incremental change of the image dimension and the incremental change of the object dimension on a mask. High DOF and low MEF (less than or equal to 1) are essential when utilizing high numerical aperture (NA) optics and for resolving device feature sizes of 90 nm and smaller.
Therefore, what is needed is a method of manufacture and system that addresses the issues discussed above.